OpenBSD: SMT Disabled by Default in -current

SMT (Simultanious Multi Threading) implementations typically share
TLBs and L1 caches between threads.  This can make cache timing
attacks a lot easier and we strongly suspect that this will make
several spectre-class bugs exploitable.  Especially on Intel's SMT
implementation which is better known as Hypter-threading. 

REF: https://undeadly.org/cgi?action=article;sid=20180620110722